SDR'09 Technical Conference and Product Exposition

SDR'09 Tutorials

Tutorials have been announced!

There are tutorials on all four days - Tuesday, Wednesday, Thursday and Friday

Tuesday, Dec. 1

• Jean Dassonville, Agilent Technologies, "Digital Software Defined Radio Test"

This tutorial presents the topic of digital software defined radio test. Specifically we will dive into the baseband devices, covering timing, microprocessor and FPGA tools that can greatly minimize the test time required. Included are techniques for probing high speed digital interfaces, measurement and timing correlation between microprocessor, DSP and memory devices as well as methods for easily accessing the signals embedded in FPGAs. Additionally, we will cover some aspects of waveform modulation quality given that many of these measurements are now made from a digital interface.

• John Shanton, Thales Communications, Inc., "VoIP Radio Networks"

This tutorial is a survey of Voice Over Internet Protocol (VOIP) for wireless radio networks. Special attention is given to the implications of VOIP transport for the link layer and physical layer of networked radio systems. The issues of latency, link quality, and throughput are discussed for emerging radio networks. The relationship of latency to RTP and special adaptations are discussed. An overview of traditional Internet based full duplex digital voice communications will be given. The special issue of bridging full duplex digital voice packets onto half duplex radio networks is discussed.
This tutorial will give an overview of the higher layer SIP (Session Initiation Protocol) as used in Internet based telephony. SIP as applied to radio networks and especially the issues of mapping SIP to mobile and rapidly changing radio networks is covered. At the end of the session, an application overview will be given that describes an actual VOIP network (MMAR) that integrates ground based narrowband radios by bridging them into a Tactical Data Link airborne radio network and ultimately connects radios to VOIP personal computers on the ground. This will show the special considerations of bridging a handheld PTT tactical radio that is bridged and transported via RTP and the network setup using SIP.

• Vincent Kovarik, Harris Corporation, "Building Software Defined Radios with SysML, UML, and MARTE"

Software defined radio development is a complex process involving many diverse stakeholders. Modeling allows raising the level of abstraction in systems development. There are two main specifications for modeling SDR systems: Software Communications Architecture and OMG PIM and PSM for Software Radio. These SDR specific specifications have focused on the software architecture aspect of the radio system, and do not address the system aspect or detailed design of the software.
The Systems Modeling Language (SysML) provides the modeling concepts for capturing the specification and design of a system or system-of-systems. This specification and/or design can then be analyzed, verified and validated to ensure that specific requirements and constraints are satisfied. The SysML can be used to model the system side of a SDR.
The Unified Modeling Language (UML) is a general purpose modeling language that is often used for architecting and designing software applications. The UML provides the concepts to model both the structural and behavioral aspects of a software application. In the context of SDR, the UML can be used to model the detailed structural design and behavior of the software side of the radio.
While the UML is a general purpose modeling language, the MARTE specification provides the concepts necessary for modeling real-time and/or embedded systems. The concepts allow for the specification of rich quality of service requirements and timing constraints. This model can then be analyzed at design time to verify that it will meet the requirements captured in the model.
This tutorial shows how an SDR can be designed from requirements to detailed design using SysML, UML and MARTE. We then explore the different types of analysis that can be done using this model. More specifically we will:


1. Show how to model SDR systems with SysML
2. Show how to model the detailed design of the software aspects of an SCA SDR using UML
3. Show how to annotate the UML model with the concepts from MARTE to enable the analysis of the SDR systems software
4. Show how to link the different models in order to build a consistent model of the system.

The tutorial will use a case study; an SDR waveform that is from the public domain; to help emphasize the material covered.

• Greg Jue, Agilent Technologies and Toby McClean, Zeligsoft, "Agilent / Zeligsoft Rapid Prototyping"

The development of SCA waveforms is a complex process that requires dealing with different system design aspects, including signal processing, component definition, and component distribution on physical processing elements. Software defined radio development is an iterative process. Iterative development allows developers to deal with greater complexity.
The ability to rapidly prototype SCA waveforms is key to reduce risk early in the development process and avoid “big bang” integration. In particular, rapid prototyping enables:


• Exploration of alternate designs
• Validation of different system aspects
• Execution of the models early in the development process and at different development stage

Tooling provides assistance for reducing complexity and rapid prototyping with automation, generation and validation. Integration points between the different tools and technologies are available to help engineers to bring hardware, software and signal processing together into one software defined radio.
This tutorial introduces a rapid prototyping approach for SCA waveforms that is based on the integration of Agilent Technologies SystemVue and Spectra CX. The main phases of this approach consists of :

• Golden Waveform Design. This phase consists in defining the signal processing elements of the waveform using SystemVue. The SystemVue model is exercised to conduct early validation of the golden waveform, for both baseband PHY and link-level RF/channel compliance, using algorithmic verification against IP reference models and test equipment.
• Signal Processing Code Generation. This phase consists in generating and compiling the C++ source code. The source code is examined to determine interfaces for communication, which are then used to create ports on SCA components. The SystemVue generated code is exported along with an .XML description.
• SCA Component-Based Design. This phase consists in creating an SCA component-based model to encapsulate the golden waveform signal processing elements. This involves designing the overall waveform architecture and partitioning of the signal processing elements into SCA components. Spectra CX is used in this phase to design the waveform, validate key aspects, and generate SCA required code.
• Deployment Modeling and Analysis . This phase consists in choosing component build environments for component distribution on physical processing elements. The build environment for each component is created and modified to include the SystemVue generated header files and link to the correct libraries. The SCA component source code and build environments are generated and compiled from Spectra CX. The final products are SCA component binaries with behavior generated from SystemVue.
• Execution. This phase consists in running and testing the SCA waveform on the platform (host or target) – with the “OE-in-the-loop”. Components are deployed to the platform based on their implementation dependencies and device allocation properties. The waveform running in the SCA operating environment will be shown to exhibit the same behavior as the SystemVue model. 

The tutorial will use a sample waveform to demonstrate the typical use of the tool chain and will highlight the interaction points between the different tools. Special attention will also be paid to the iterative nature of the process.

• Elfriede Dustin, IDT, "Advances in Automated Software Testing and Quality Technologies and Implementation in use for Waveforms"

  This presentation discusses Certification, Validation, Testing and Tools used for verifying the quality and portability of radio waveforms, and our various efforts to streamline use of relevant tools throughout a QA process and automated software testing implementations, by automating the test automation via use of existing open source tools, component reuse and incorporating all tools and results into a centralized repository, which we call the Portability Compliance Checker (PCC).
  Our PCC framework presented here provides software implementation and utilities in support of JTRS waveform Portability Assessment Procedures along with QA verification to include automated software testing, all combined into one central repository/framework.

• John Izra, The MathWorks, "Software Defined Radio Workflow Using Simulink and the USRP2"

  In this tutorial, we introduce a user-friendly software-defined radio (SDR) development workflow for prototyping, research and education in wireless communications and networks. This workflow consists of multiple SDR platforms capable of digital modulation with synchronization and full control over the physical to network layer of the radios and an interface to the Simulink software package. Using the Universal Software Radio Peripheral 2 (USRP2) platform as the RF front end, this interface will use Simulink for software radio development and signal processing libraries. This combination of hardware and software will enable simple design and verification of radio systems in simulation, while allowing the user to easily test the system with live, over the air transmission. The use of Simulink for radio development will provide streaming access to the USRP2 via a user-friendly workflow environment. These commonly available software packages and the USRP2 will make communication system prototyping both affordable yet highly versatile, enabling research and development groups around the world to conduct advanced experiments into new wireless communications and networking architectures including cognitive radio. The interface will allow students to become familiar with tools used in industry while learning communications and networking concepts through labs designed for undergraduate coursework. The 3 hour hands-on tutorial will include the following topics: 1. MATLAB and Simulink as Verification Tools: Radio development will include impairments such as fading and transmission delay, requiring equalization and synchronization. 2. Simulink-based Wireless Communication Experimentation using the USRP2 Platform: Simulink blocks interfacing to the USRP2 will be added to the modeled developed in the first section of the tutorial. 3. Advanced Communication Systems Education and Training using Simulink and USRP2: Cognitive radio techniques including spectrum sensing and dynamic spectrum access will be introduced to the models developed in the first two sections of the tutorial.

• Steve Jennis, PrismTech, "An affordable COTS Reference Platform for SCA Development - The 'IBM PC' of Military SDR"

  Much attention in the last few years has been focused on the evolution of the Software Communication Architecture (SCA) - as the software infrastructure standard for military SDR. The SCA facilitates waveform application portability, platform interface standardization, and fielded radio reconfiguration; all in support of delivering new communication functionality to the war-fighter faster and at less expense than traditional hardware-defined radios. Furthermore, the original goals of the SCA included the opening up of the military radio supplier eco-system to new platform technologies (e.g. FPGAs), new waveform application and development tool vendors (e.g. MDE specialists), and the leveraged use of COTS SDR technologies; again, all in pursuit of lower costs and the faster fielding of new capabilities in a communications world of rapidly changing requirements and technologies.
  SCA operating environments (OEs) and development tools have evolved at a rapid pace in the past few years, making SCA-compliance possible today for even small form-factor radios with significant SW&P constraints. Technological evolution continues apace with new benchmarks for performance, footprint, processor coverage, and tool productivity being announced in every COTS product release cycle (e.g. Spectra v2.1 by PrismTech).
  However, despite these software advances, the industry has been missing an affordable COTS reference platform for SCA developers. COTS SCA radios with sophisticated development tools often cost over $100,000 today. This is a severe inhibitor to market growth and customer choice, as without a COTS reference platform new vendors find it difficult, as well as expensive, to provide SCA-compliant solutions.
  This paper and demonstration introduces an affordable COTS reference platform/radio complete with leading-edge features like SCA Everywhere (GPP, DSP and FPGA coverage), model driven engineering tools, and sophisticated SCA-compliance validation all for a very affordable entry-level price. This platform has the potential to become the IBM PC of SCA/SDR and so open up the market to SCA developers thus driving down costs, improving choice and growing the market for SCA/SDRs.
  The presenter will explain in detail the technical challenges involved in producing a sophisticated, yet affordable, SCA reference platform, with particular reference to ensuring SCA compliance, supporting waveform portability and evolution (across a multi-processing environment), meeting radio SW&P constraints, and providing highly productive development tooling. Significant new technologies and optimizations are involved in packaging SCA for small form-factor radios. This presentation and demonstration will address those technologies and show how PrismTech is leading the field in producing COTS SCA products.

Wednesday, Dec. 2

• Robert Normoyle, DRS Signal Solutions, Bob Cutler, Agilent, Chuck Dexter, DRS Signal Solutions and Marshall Cross, Megawave, "RF Performance Specification, Measurement and Built in Tests for Software Defined Radios"

This workshop is composed of three sessions that will provide an understanding of RF performance parameters for antennas and transceivers and how to measure them using the latest test equipment. It also covers built-in-design approaches to dynamically measure the RF performance of a deployed software defined radio (SDR). The four sessions will be given by experts in the industry with respect to the technology subject matter. The first session will be given on antennas will be given by MegaWave, which will focus on practical methods and procedures to measure the electrical characteristics and performance of VHF and UHF antenna systems. The second session will be given by DRS Signal Solutions, which will explain the critical RF performance parameters of SDR transceivers. The third session will be given by Agilent and will demonstrate the latest RF test tools and how they can be used to measure both antenna and transceiver RF performance.

• Specifying Antenna performance, by Marshall Cross, Megawave
• Specifying and  RF Tuner Performance in Receiving Systems, by Charles Dexter, DRS Signal Solutions
• Measurement Techniques and Tools of RF of Antennas and Receivers, Bob Cutler , Agilent

• Mohammed Ismail, Ohio State University, "BIST and Digital Self-Calibration of RFICs"

To achieve the highest performance/price ratios of a handheld wireless devices, the current trends in wireless chip set development call for multi-standard nanometer CMOS radios integrated on a single chip. This represents a grand challenge to the yield of such chip sets and typically requires several silicon spins which will increase the NRE development costs and may result in significant product delays and in missing important market windows. To meet this challenge we present design techniques for built-in self-test (BIST) and digital self calibration of multi-band,multi-mode CMOS radio systems and demonstrate the validity of these techniques in the design of WiMAX/LTE CMOS radio front ends. The presentation will also review the basic principles of zero-IF CMOS multi band,multi mode radios form antenna to bits and will present a compact transciever architecture suitable for TDD radio systems.
The tutorial is intended for RFIC ,baseband and SoC design engineers, researchers and graduate students as well as product and marketing managers . The material will be given at an introductory level. So newcomers to the field will be welcome.
The tutorial will cover the follwoing main topics: 

• Evolution of the wireless technology beyond 3G
  
• The nanometer CMOS RF radio design problem
• Buillt-in-selt-test and self aware RFIC design
• Digital self-calibration techniques
• Case studies of an RF front-end  for WiMAX/LT

Thursday, Dec. 3

• Chris Dick, Xilinx, "A Platform-Based Approach to Realizing High Performance DSP Systems in FPGAs"

FPGAs have become key components in implementing high performance DSP systems, especially in the areas of digital communications, video, and image processing. The compute/memory bandwidth of a modern FPGA far exceeds that of a microprocessor or DSP processor running at clock rates two to ten times that of the FPGA, and with their capability for realizing highly parallel arithmetic micro-architectures, FPGAs are ideally suited for creating custom data path processors. Despite these characteristics, FPGAs have not been broadly adopted in the DSP community because traditional programming models are based around hardware description languages (HDLs) like VHDL and Verilog, and electronic design automation tools that are foreign to most signal processing engineers.
In the recent years, a number of commercial design tools have made strides in bridging the gap between the C programming language and HDLs, and between the MATLAB / Simulink environment (The Mathworks, Inc.) and HDLs and hardware-centric intellectual property (IP) libraries especially targeting FPGAs. This workshop describes a platform-based approach to realizing DSP systems in FPGAs that combines algorithm-centric programming models, high-level modeling environments, automatic code generation, standard hardware platforms, and embedded software. We demonstrate ways in which the platform provides descriptive expressiveness, fine-grained control of hardware architecture, and faithful simulation semantics from a system level environment. With interfaces and abstractions to implement data paths, control, and embedded software, each in a language suited to a particular function, and with heterogeneous simulation semantics and deployment, this platform enables a DSP design team to target FPGAs with less FPGA-specific expertise than ever before possible. To further highlight the utility of a model based design approach to realizing FPGA embedded systems we provide a detailed overview of how Simulink-based modeling tools can be employed to efficiently produce implementations of wireless communication systems. The architecture and programming methodology for realizing digital IF processing functions and a sphere detector-based MIMO decoder for spatial multiplexing MIMO systems will be reviewed in detail. An overview of the algorithmic and micro-architecture design considerations for producing area efficient FPGA realizations of these functions will be provided.

• Brian Dalio, Coherent Logix, "Rapid Implementation of SDR in a Unified Development Environment"

OFDM-based waveforms are increasing in importance, for both wired and wireless applications.  In this paper, we present the agile development, implementation, and verification of an OFDM waveform PHY level on a Software Defined Radio development platform which supports a custom massively parallel processor.  The SDR platform is supported by a tailored and highly productive development system emphasizing the value of a structured development process that takes the developer through modeling, trade-off analysis, implementation, and verification.  We present details of the OFDM models themselves, the design and trade-off process used to create them, their characterization and verification, and their ultimate performance characteristics.  Central to the SDR platform is a custom massively parallel processor which is used for all signal processing, control, and data management aspects of the OFDM waveform.  We present the architectural details of this computational fabric and discuss its advantages and disadvantages in the implementation of OFDM waveforms in particular and SDR applications in general.  Finally, we present an analysis of the cost and time of implementation of the waveform versus its final performance characteristics and the path for future development of the specific waveform, the SDR platform, and the computational fabric.

Friday, Dec. 4

• Carl Dietrich, Virginia Tech, "SCA-Based Education and Rapid Prototyping using OSSIE: A Hands-On Tutorial"

  This tutorial introduces easy-to-use, open-source tools for rapid prototyping and interactive control of SCA-based SDR waveform applications, and provides hands-on experience developing waveform applications and components with an SCA-based software radio framework and tools suitable for education, research, and rapid prototyping. Based on experience with similar workshops, it is anticipated that many participants will be able to develop SCA receiver applications and use them with RF hardware to receive radio signals within the workshop time frame. The session begins with a brief overview of software defined radio including basic concepts, education, research topics, and the Software Communications Architecture (SCA). OSSIE, Virginia Tech's open source implementation based on the SCA, is introduced through hands-on activities developed by the Naval Postgraduate School and Virginia Tech. Lab materials as well as the OSSIE core framework and associated rapid development and application software are provided to participants and are also available for free download.

• fred harris, San Diego State University, "Multirate Signal Processing in Communication Systems"

Most of us know how to design multirate Digital filters to accomplish bandwidth and sample rate changes. The traditional structures that accomplish this task are the polyphase FIR filter, the dyadic half-band filter, and the cascade Integrator and comb filter. Computationally efficient resampling filters can also be formed from recursive all-pass subfilters operating in the conventional polyphase structure. These subfilters, exhibit unity magnitude response, are adjusted to have phase shifts that add constructively in the defined pass band and destructively in the stopband. The computational burden of these filters is one-fourth to one-sixth of standard resampling filters. Linear phase recursive filters can also be built in class of filters. This presentation will review multirate filters in the standard FIR configuration as well as the IIR configurations. This presentation will illustrate a number of traditional signal-conditioning problems solved with the FIR and IIR solutions.